Gray code counter Gray code counters are used in FIFO design because they only allow one bit to change for each clock transition. This characteristic eliminates the problem associated with trying to ...

Designed a 4-bit counter using a J-K flip-flop that has a clocked input with reset. Performed simulations of various output parameters like rise time and fall time. The design is done using cadence ...

This project implements a generalized, parameterized N-bit up/down counter using Icarus Verilog (iverilog). The counter width can be changed easily using a parameter, allowing the design to scale to ...

Adders are one of the widely used digital components in digital integrated circuit design. In this paper, various adder structures can be used to execute addition such as serial and parallel ...