GitHub

srsapireddy/RTL-Design-in-Verilog-using-SKY130-Technology

SKY130 is the hardware industry's first open-source process design kit (PDK) released by SkyWater Technology Foundry in collaboration with Google giving all hardware design experts and aficionados: ...
GitHub

QiMeng-SALV: Signal-Aware Learning for Verilog Code Generation

QiMeng-SALV introduces a novel framework for Verilog code generation that shifts reinforcement learning optimization from module-level to signal-level rewards. By leveraging AST analysis and ...