Rated at 30 MIPS at a frequency of 40 MHz, the Field Programmable System Level Integration Circuit (FPSLIC) combines an 8-bit microcontroller with over 50 kgates of FPGA or PLD programmable logic.

The agreement could turn out to be a springboard for Forte, allowing it to jump into the expansive PLD user market. Previously, Forte's GigaScale suite solely targeted ASIC and system-on-chip (SoC) ...