Electronic Design

Low-Density Parity Check Error Correction for Solid State Storage

Error Correcting Code (ECC) technology, such as Low-Density Parity Check codes, has been around longer than most of you reading this have been alive. The reason is ...
IEEE

eLDPC: An Elastic and Scalable LDPC-Decoder with Early Termination by Effectively Leveraging High-Level Synthesis

Abstract: Emerging communication and storage embrace Low-Density Parity-Check (LDPC) codes to fully exploit their physical channels. FPGA (Field-Programmable Gate Array) is widely employed to fast ...
GitHub

DecodeX Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms

This repository presents DecodeX, a unified benchmarking framework for evaluating low-density parity-check (LDPC) decoding acceleration across different hardware platforms. DecodeX integrates a ...
EDN

Low power LDPC decoder created using high level synthesis

HLS methodology allows the hardware design to be completed at a higher level of abstraction such as C/C++ algorithmic description. This provides significant time and cost savings, and paves the way ...
IEEE

In-Memory Non-Binary LDPC Decoding

Abstract: Low-density parity-check (LDPC) codes are an important feature of several communication and storage applications, offering a flexible and effective method ...
Electronic Design

Interview: Kent Smith Addresses Error Correction And Flash Storage Technology

The need for higher densities and packing more bits into a single cell have pushed up the number of errors that occur. Low-Density Parity Check (LDPC) error ...
Design-Reuse

Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding

This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...
Design-Reuse

Flash Memory LDPC Decoder IP Core Available For Integration From Global IP Core

January 6, 2025 - Global IP Core Sales - In the Sum Product Algorithm (SPA) for LDPC decoding the messages are sent from the check nodes to bit nodes after the SPA steps which are (for one iteration): ...