Altium has expanded support for system-level FPGA and CPLD development by adding a JTAG interface to its Nexar system. The addition of the JTAG port enables engineers to use their FPGA-development ...

Over on the University of Reddit there’s a course for learning all about FPGAs and CPLDs. It’s just an introduction to digital logic, but with a teacher capable of building a CPLD motor control board ...

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...

[Kodera2t] wanted to experiment with programmable logic. Instead of going with an FPGA board, he decided to build his own CPLD (complex programmable logic device) board, with a built-in programmer.

Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and ...

In recent years the line between CPLDs and FPGAs has been blurring, with the two distinct product types sharing more and more technical features. Altera’s second generation of its MAX family of CPLDs ...

Rajiv Nema, Senior Product Marketing Manager, Cypress Semiconductor, Inc., San Jose, Calif., Andrew Randall, Chief Engineer, Nexsan Technologies, Inc., Woodland Hills, Calif. In early 2001, Nexsan ...

Cypress MicroSystems Adds Modem Capabilities to Programmable System on Chip (PSoC) Mixed Signal Array Xilinx announces roadmap for Virtex-II Pro Easypath (Wednesday Jan. 08, 2003) Xilinx announces ...