Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic ...

Innovations in complementary metal-oxide-semiconductor (CMOS) logic are complemented by evolving FinFET architectures, both of which aim to reduce leakage power and improve switching performance.

Imec is a leading semiconductor and nanotechnology development organization. Imec roadmaps show lithography advances to a few angstrom features and enabling 3D integration. New memory technologies ...

Non-volatile bistable memory circuits being developed by Satoshi Sugahara and his team at Tokyo Tech pave the way for highly energy-efficient CMOS logic systems. The details are described in the ...

CMOS 2.0, by contrast, aims for true wafer-scale stacking, where tiers are bonded face-to-face (or face to back) in a monolithic structure and interconnected at a much finer pitch. The result is ...

Engineers choose CMOS/biCMOS logic to be “green” and reduce power consumption. CMOS and biCMOS only draw power on transitions, so those circuits run cool at slow speeds. So why is the board hot?

Any typical digital design style with CMOS uses complementary pairs of p-type and n-type MOSFETs for logic functions implementation. Naturally, CMOS always ought to provide INVERTED outputs like ...

Currently, Intel is still working on CMOS scaling, but the researchers see MESO logic driving growth in the post-CMOS era. They expect their technology to emerge in the next decade.

FREMONT, Calif., Nov 17, 2009 -- Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today announced it has completed the acquisition of NXP's horizontal advanced ...