GitHub

GatechCourses/verilog--lab-1-solved

The purpose of this lab is to build a binary multiplier circuit, verify its functionality using a testbench, then combine it with an adder/subtractor circuit to create a basic calculator. Part 1 ...
GitHub

Verilog implementation of a BCD adder along with it's test bench

There was an error while loading. Please reload this page. This project implements a BCD (Binary Coded Decimal) Adder in Verilog along with a testbench. BCD Adder ...
Hackaday

Learning Verilog For FPGAs: Flip Flops

Last time I talked about how to create an adder in Verilog with an eye to putting it into a Lattice iCEstick board. The adder is a combinatorial circuit and didn’t use a clock. This time, we’ll finish ...