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Design-Reuse

Design Compiler 2010 Doubles Productivity of Synthesis and Place and Route

MOUNTAIN VIEW, Calif., March 29, 2010 -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced Design Compiler® ...
Electronic Design

Design Compiler Points Toward Better Physical Implementation

Synopsys' Design Compiler 2010 accounts for the challenges of modern physical IC design, offering floor plan exploration from within the synthesis environment. It also delivers physical guidance to IC ...
Electronic Design

Synthesis Attacks The Abstract

Interest is growing in design at levels of abstraction above RTL, and synthesis tools seem to be meeting the challenge. HARDWARE DESIGN is a process of refining an idea from a highly abstract form to ...
Design-Reuse

Axell Switches to Synopsys' Design Compiler RTL Synthesis Solution for Graphics IC Designs

MOUNTAIN VIEW, Calif., Dec. 14, 2015 – Synopsys, Inc. (Nasdaq: SNPS) today announced that Axell, a leading fabless design company of graphics chips for interactive entertainment and industrial ...
Nasdaq

Synopsys' Fusion Compiler Adopted by AMD

AMD deploys Synopsys' Fusion Compiler RTL-to-GDSII product for the development of its next-generation processor products Unique, single-data-model architecture and unified, full-flow optimization ...